The drive toward miniaturization presents many challenges for the IC packaging industry. These challenges are partly addressed through use of leadless lead-frame packages (LLPs), which reduce the footprint and height of IC packages by eliminating leads that protrude from the sides of a package, instead employing contacts that are electrically exposed yet lie flush with an outer surface of the package. An LLP is a surface mounted IC package that uses a metal, usually copper, lead-frame substrate to both support the IC die and provide electrical connectivity. As illustrated in FIG. 1A and the successively more detailed FIGS. 1B and 1C, in known LLPs, a copper lead-frame strip or panel 101 is patterned, usually by stamping or etching, to define two dimensional arrays 103 of device areas 105. Each device area 105 is configured to support a semiconductor die. In the illustrated embodiment, each device area 105 includes a die attach pad 107 and a plurality of contacts 109 disposed about their associated die attach pad 107. Very fine tie bars 111 are used to support die attach pads 107 and contacts 109 during manufacturing. Although the thickness of the metal sheets from which the LLP lead-frames are made may vary, a typical thickness may be on the order of 8 mils (0.008″) thick.
During assembly, IC dice are attached to respective die attach pads 107 and conventional wire bonding is used to electrically couple bond pads on each die to associated contacts 109 on the device area 105. After wire bonding, a plastic cap is molded over the top surface of each device area individually, or over each array 103. The capped dice are then cut from the array and tested using known sawing and testing techniques.
FIG. 2 illustrates a cross-section of a known LLP. The die attach pad 107 supports semiconductor die 120, usually attached by an adhesive 160. Die 120 is electrically connected to its associated contacts 109 by bonding wires 122. A molded plastic cap 125 encapsulates the die 120 and bonding wires 122 and fills the gaps between the die attach pad 107 and the contacts 109, thereby holding the contacts in place. During singulation, tie bars 111 are cut. The resulting packaged chip can then be surface mounted on a printed circuit board or other substrate using known techniques.
Although the current lead-frame based chip scale package designs work well, there are continuing efforts to provide new and better packages for specific applications.